1. The Field of the Invention
In general, the invention relates to vertical cavity surface emitting lasers (VCSELs). More specifically, exemplary embodiments of the invention are directed to VCSELs capable of long wavelength emissions.
2. Related Technology
VCSELs represent a relatively new class of semiconductor lasers. While there are many variations of VCSELs, one common characteristic is that they emit light perpendicular to a wafer's surface. Advantageously, VCSELs can be formed from a wide range of material systems to produce specific characteristics. In particular, the material systems can be tailored to produce laser wavelengths such as 1550 nm, 1310 nm, 850 nm, 780 nm, 670 nn, and so on.
VCSELs include semiconductor active regions, distributed Bragg reflector (DBR) mirrors, current confinement structures, substrates, and electrical contacts. Because of their complicated structure and material requirements, VCSELs are usually fabricated using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
FIG. 1 illustrates a typical VCSEL 10. As shown, a substrate 12 has an n-type electrical contact 14. An n-doped lower mirror stack 16 (a DBR) is on the substrate 12, and an n-doped graded-index lower spacer 18 (a confinement layer) is disposed over the lower mirror stack 16. An active region 20, beneficially having a number of quantum wells, is formed over the lower spacer 18. A p-doped graded-index top spacer 22 (another confinement layer) is disposed over the active region 20, and a p-doped top mirror stack 24 (another DBR) is disposed over the top spacer 22. Over the top mirror stack 24 is a p-doped conduction layer 9, a p-doped cap layer 8, and a p-doped electrical contact 26.
Still referring to FIG. 1, the lower spacer 18 and the top spacer 22 separate the lower mirror stack 16 from the top mirror stack 24 such that an optical cavity is formed. As the optical cavity is resonant at specific wavelengths, the mirror separation is controlled to resonate at a predetermined wavelength (or at a multiple thereof). At least part of the top mirror stack 24 includes an insulating region 40 that provides current confinement. The insulating region 40 is usually formed either by implanting protons into the top mirror stack 24 or by an oxide layer. The insulating region 40 defines a conductive annular central aperture 42 that forms an electrically conductive path though the insulating region 40.
In operation, an external bias causes an electrical current 21 to flow from the p-doped electrical contact 26 toward the n-doped electrical contact 14. The insulating region 40 and the conductive central aperture 42 confine the current 21 such that the current flows through the conductive central aperture 42 to the active region 20. Some of the electrons in the current 21 are converted into photons in the active region 20. Those photons bounce back and forth (resonate) between the lower mirror stack 16 and the top mirror stack 24. While the lower mirror stack 16 and the top mirror stack 24 are very good reflectors, some of the photons leak out as light 23 that travels along an optical path. Still referring to FIG. 1, the light 23 passes through the p-doped conduction layer 9, through the p-doped cap layer 8, through an aperture 30 in the p-doped electrical contact 26, and out of the surface of the VCSEL 10.
It should be understood that FIG. 1 illustrates a typical VCSEL, and that numerous variations are possible. For example, the dopings can be changed (say, by providing a p-doped substrate 12), a wide range of material systems can be used, operational details can be tuned for maximum performance, and additional structures, such as tunnel junctions, can be added. However, the VCSEL 10 beneficially illustrates a useful, common, and exemplary VCSEL configuration. Therefore, the fabrication of the VCSEL 10 will be described in more detail.
The substrate 12 effectively controls the bottom DBR and the active region. This is because overall lattice matching is extremely important since the active region 20 is intolerant of lattice defects. In practice, a semiconductor epitaxy is formed on the substrate 12 to improve lattice matching. The particular semiconductor epitaxy used is wavelength and device dependent. For 1310 nm emissions from GaAs substrates the semiconductor epitaxy is usually AlGaAs and/or InGaAsN and/or InGaAsNSb of varying compositions. For 1550 nm emissions from InP substrates the semiconductor epitaxy is usually AlGaAsSb and/or AlGaInAs and/or InGaAsP and/or InP. For 1550 nm emissions from GaAs, the semiconductor epitaxy is usually AlGaAs and/or InGaAsNSb.
With the substrate 12 and the semiconductor epitaxy in place, the lower mirror stack 16 is fabricated. For 1310 nm or 1550 nm emissions from GaAs substrates 12 the lower mirror stack 16 is beneficially comprised of alternating compositions of Al(x)Ga(1−x)As that produce high and low index layers. For emissions at 1550 nm from InP substrates 12 the lower mirror stack 16 is beneficially comprised of alternating compositions of InGaAsP/InP, of AlGaInAs/InP, of AlGaAsSb/InP, or of AlGaPSb/InP. The compositional and doping grades of the layers should be selected to improve electrical properties (such as series resistance).
After the lower mirror stack 16 is grown, the lower spacer 18, the active region 20, and the top spacer 22 are fabricated. The lower spacer 18 and the top spacer 22 are beneficially comprised of low-doped layers having compositional grades. The active region 20 beneficially includes a plurality of quantum wells (say 3 to 9) that are sandwiched between higher bandgap energy semiconductor barrier layers.
The top mirror stack 24 having the insulating region 40 having the conductive central aperture 42 is then fabricated over the top spacer 22. The top mirror 24 is beneficially formed (described in more detail subsequently) from similar layers as the lower mirror stack 16. Then, the p-doped conduction layer 9, the p-doped cap layer 8 having the aperture 30, and the p-doped electrical contact 26 are fabricated.
Still referring to the fabrication of the top mirror stack 24, if an oxide layer is used to form the insulating region 40 the top mirror stack 24 includes a high aluminum content layer that is bounded by lower Al content layers. A trench is then formed to the high aluminum content layer. The high aluminum content layer is then oxidized via the trench to produce the insulating region 40. Alternatively, if ion implantation is used to form the insulating region 40, then such ions are implanted into the top mirror stack 24. The incoming ions damage the top mirror structure so as to form the insulating region 40. In either event the top mirror stack 24 must be thick enough for adequate current spreading. Ion-implanted VCSELs have demonstrated greater reliability than those that use oxidized layers, but oxide VCSELs have advantages of higher speed and higher efficiency.
While generally successful, VCSELs are not without problems. In particular, VCSELs used at long wavelengths, such as 1550 run or 1310 run, are currently significantly less than optimal. However, long-wavelength VCSELs (1.3 μm–1.6 μm) are well suited for next generation data communication and telecommunication applications.
A major problem with long wavelength VCSELs is fabricating their top mirror stacks 24. This is partially because the refractive index contrasts of the materials used in the top mirror stacks 24 are relatively small, which means that the top mirror stacks 24 must have many contrasting layers. This makes the top mirror stacks 24 relatively thick. Compounding the thickness problem is that long wavelength operation makes otherwise comparable structures thicker simply because of the longer wavelengths. Thus, long-wavelength VCSELs tend to have very thick top mirror stacks 24. But, thick mirror stacks are difficult to ion implant protons (such as is required when forming ion implanted insulating regions 40) and are difficult to etch, as is common when producing trenches for oxide VCSELs. Thus, long wavelength VCSELs require higher energy, are more expensive, are more difficult to implant, and have longer etching cycles.
Compounding the fabrication problem are VCSEL arrays. While FIG. 1 shows an individual VCSEL, in many applications multiple VCSELs are fabricated on a single substrate simultaneously. It is then necessary to isolate the individual VCSEL elements. This is usually performed either by etching trenches or by ion implanting through the active region 20. Again, a thicker top mirror stack 24 and a thicker top spacer 18 and active region 20 are required for longer wavelengths. Thus, isolating individual VCSEL elements is difficult.
In view of the foregoing, novel long-wavelength VCSELs would be beneficial. Even more beneficial would be long-wavelength VCSELs having thinner top DBR mirror structures.